The Advantages of Embedded FPGA for Aerospace and Defense: Page 2 of 2

New embedded FPGA technology offers a more reliable, lower power, and smaller option over traditional FPGAs, particularly for aerospace and defense applications

nm with applications such as MCU/IoT, the emphasis is on power. Thus, embedded FPGA companies optimize their products to have more power management modes, low voltage state retention, and other features.

In 28/16-nm applications, the emphasis is on performance so embedded FPGA companies optimized for that. I/O requirements tend to be very large, especially on inputs. A relatively lower performance requirement is I/O control, such as in a MCU or IoT, where embedded FPGA can enable local processing of I/Os to reduce the overall system power by not having to activate the MPU or where it can implement additional serial I/O functions as needed. An intermediate application is where the embedded FPGA is a block of reconfigurable RTL on a processor bus.

Using Embedded FPGA to Fit Your Needs

Embedded FPGA is available now on several mainstream processes such as TSMC 16-, 28-, and 40-nm offerings. For aerospace and defense applications, embedded FPGA companies can “port” their embedded FPGA architectures to any CMOS process, including using a Rad-Hard cell library, including USA and Trusted Fabs, in six months or less.

One key advantage of embedded FPGA is the ability to allow customers to design chips in whatever size or configurations array they require. FPGA chips come in a wide range of sizes and customer applications will need a wide range of embedded FPGA sizes and options.

One way this can be achieved is by using tileable building blocks of cores of stand-alone FPGAs. In this sort of configuration each core has an extra top-layer of interconnect that allows one core to connect automatically to surrounding neighbors to make a large array up to NxN.

An array can be all-logic or all-DSP or any mix of the two types of cores: It is also possible to embed large amounts of RAM in the embedded array. One method of achieving this is by using standard RAM compilers to generate any kind of RAM that the customer requests (single port, dual port; ECC/parity/none; as much as wanted) and positioning the RAM between the cores. 

Using the above approach allows a few cores to generate an almost limitless variety of embedded FPGA arrays to suit any customer requirement.


Geoff Tate is the CEO of Flex Logix , a provider of solutions for reconfigurable RTL in chip and system designs using embedded FPGA IP cores and software. 






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